If you read my first post about a simple CPLD do-it-yourself project you may remember that I seriously wiffed when I made the footprint 1” wide, which was a bit too wide for common solderless ...

[Chris] continues cranking out the tutorials, this time around he’s showing how to use a CPLD for simple motor control. The demo hardware is pretty basic, he built his own FPGA/CPLD demo boar… ...

The CPLD implementation can monitor PCB power supply voltages (3.3V, ... During testing, an FFT was run on the captured data using the PScope software from Linear Technology. The circuit response to ...

The “modern” way to generate white noise is to use a digital shift/feedback register arrangement in a CPLD or FPGA. ... The design goal here was to generate a large amount of noise that is flat over ...

San Jose, Calif. — The EPM3512A is a 3.3-V CPLD that delivers 512 macrocells. Fabricated in a 0.3-micron four-layer metal process, the CPLD delivers 7.5-ns pin-to-pin performance and frequency counter ...

Quadrature encoders have many uses in position-sensing applications. This implementation uses a Xilinx complex programmable logic device (CPLD) to count the pulses from the encoder and determine ...

Although the Altera MAX IIZ CPLD is a digital programmable logic device, it is versatile enough to control analog systems. This article shows how MAX IIZ CPLDs – alone or with a few passive ...

San Jose, Calif., April 5, 2005„ŸAltera Corporation (NASDAQ: ALTR) today announced the immediate production availability of the EPM2210 device, the largest member of the MAX ® II CPLD family, ...