You don’t usually think of simulating Verilog code — usually for an FPGA — as a visual process. You write a test script colloquially known as a test bench and run your simulation.

Abstract: SystemC 2.1 supports all hardware concepts introduced by HDLs such as Verilog and VHDL. V2SC proposes a methodology for automatic conversion of Verilog 2001 constructs into SystemC 2.1 ...